PCB 阻抗计算器 — 微带线、带状线与共面波导指南

USB 2.0 uses 90Ω differential for the D+/D- pair at 480 Mbps. USB 3.x (SuperSpeed at 5 Gbps and above) moves to 100Ω differential because the higher data rate is more sensitive to return-path discontinuities and the 100Ω standard matches the rest of the high-speed ecosystem (PCIe, HDMI, DisplayPort). If your design needs both, route each pair to its own target — the board can't share a single trace width between them and still pass eye-diagram testing.

No. Controlled impedance only matters when the signal's electrical length becomes comparable to its rise time — roughly when the trace length exceeds 1/10 of the wavelength at the highest frequency of interest. For slow signals (I2C, SPI under 10 MHz, UART, button GPIO), the trace behaves as a lumped wire and impedance doesn't affect signal integrity. The cutoff is roughly 500 Mbps or a rise time faster than 2 ns — below that, use normal routing rules; above that, spec controlled impedance with your fab and run the calculator.

Microstrip wins for cost and debuggability — it's on an outer layer, so you can probe it, solder on test points, and see it in a 3D viewer. It's the default for one- to four-layer boards. Stripline wins for signal integrity — the return path is defined on both sides, there's no air-gap variation, and EMI radiation is dramatically lower. For anything above 5 Gbps or any board that has to pass Class B emissions tightly, push the critical traces to internal stripline layers and use outer layers for slow control signals. Cost difference is usually just two extra layers, which is often already needed for dense boards.

Three common reasons. First, actual Er of FR-4 varies from the spec value — glass weave direction, resin content, and moisture can shift Er by 5–10%. Your fab's TDR measurement is the real number. Second, copper etching is trapezoidal, not rectangular — real trace cross-section is narrower at the top than the bottom, and calculators vary in how they model this. Third, plating adds copper thickness unevenly, especially on fine pitch. For 5% accuracy you need your fab's actual stackup parameters. For 10% accuracy the calculator is usually fine.

For standard geometries (microstrip, stripline, coplanar waveguide) at typical PCB frequencies, the Wadell-family equations all online calculators use produce identical results to within 1–2%. Polar and similar paid tools add value in three areas: 2D field-solver accuracy for asymmetric or unusual geometries, vendor-calibrated material libraries with measured Er curves over frequency, and auditable reports that satisfy customer compliance requirements. For hobbyist and small-team work, an online calculator plus your fab's TDR report is enough. For high-speed production work under tight SLAs, the paid solver pays for itself in one avoided respin.