PCB DFM Check
Find out whether the factory can actually build your board — before you pay for it. Runs entirely in your browser against real manufacturer process limits.
Open the viewerWhat a DFM check is
Design for Manufacturability is the gap between a board that is electrically correct and a board a specific factory can physically produce. Your EDA tool checks the first. Nobody checks the second until the fab emails you two days after you ordered. A DFM check closes that gap by comparing the geometry you actually drew against the process limits the factory actually publishes — trace widths their etcher can hold, holes their drills can make, copper clearances their routers will not chew through.
What gets checked
Nine checks run on the parsed board geometry. Each one reports the worst measured value, how many features violate it, and what to do about it.
| Check | What it measures | Why it matters |
|---|---|---|
| Board size | Shortest and longest board edge against the fab's panel limits. | Undersized boards need panelizing or a breakaway frame; oversized ones fall outside standard turnaround and need a custom quote. |
| Layer count | Whether the copper layer count is a stock option. | Odd counts (3, 5, 7) are not manufactured — the stackup is built from bonded pairs, so you pay for the next even count anyway. |
| Minimum trace width | The thinnest copper trace on any layer. | Below the etch limit, traces come out necked or open. This is the single most common reason a hobby board is rejected. |
| Minimum trace spacing | The smallest copper-to-copper gap between different nets on the same layer. | Too tight and the etchant cannot clear the gap, leaving a short between nets that no amount of reflow tuning will fix. |
| Minimum hole size | The smallest finished drill diameter across vias and mounting holes. | Mechanical drills have a floor. Below it you need laser-drilled microvias, which is an advanced process at a different price. |
| Annular ring | Copper left around each via hole: (pad diameter − drill) / 2. | Drill placement has tolerance. Too little ring and the bit breaks out through the pad edge, killing the connection. |
| Copper to board edge | Distance from traces and vias to the board outline. | Routing and V-scoring have their own tolerance. Copper too close to the edge gets nicked, exposed, or delaminated. |
| Silkscreen line width | The thinnest silkscreen stroke. | Below the print resolution, legends come out broken or vanish. Cosmetic — it will not stop the order. |
| Silkscreen text height | The smallest character height. | Tiny labels print as smudges, which defeats the point of having reference designators on the board. Cosmetic. |
Manufacturer limits used
| JLCPCB | PCBWay | |
|---|---|---|
| Min trace width | 0.127 mm | 0.1 mm |
| Min trace spacing | 0.127 mm | 0.1 mm |
| Min hole size | 0.2 mm | 0.2 mm |
| Min annular ring | 0.13 mm | 0.13 mm |
| Min copper to edge | 0.2 mm | 0.2 mm |
| Board size | 5–500 mm per side | 5–500 mm per side |
| Min silkscreen width | 0.153 mm | 0.15 mm |
| Min silkscreen text | 1 mm | 1 mm |
| Layer counts | 1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20 | 1, 2, 4, 6, 8, 10, 12, 14 |
| Verified | 2026-08-28 | 2026-08-28 |
These figures are read from each fab's public capability page for their standard (non-advanced) process. The date each profile was verified is shown in the report — processes change, so confirm before ordering.
How to run it
1. Open your board — drag a KiCad, Gerber, Eagle, EasyEDA, Altium, PADS, P-CAD or Protel 99 file onto the viewer.
2. Click DFM in the toolbar.
3. Pick your manufacturer from the dropdown.
4. Expand any check to see the limit, the count, and the fix.
5. Hit "Show in 3D" to pin every violating feature onto the board so you know where to go in your EDA tool.
DRC is not DFM
Running DRC in KiCad or Altium tells you the board matches the design rules you configured. That is a check against yourself. If you set 6 mil clearance because that is what the default template shipped with, DRC passes happily while the fab you picked needs a different minimum on 4 layers. DFM checks against the factory instead. Run both — DRC catches shorts and unconnected nets that DFM never looks at, and DFM catches process violations DRC has no opinion about.
FAQ
What is the difference between DRC and DFM?
DRC asks whether the design is internally consistent — shorts, unconnected nets, traces thinner than your own design rules. DFM asks a different question: can this particular factory build it? A board can pass DRC in your EDA tool and still be unmanufacturable, because your design rules were never set to match the fab you ended up choosing. That is why the check here is per-manufacturer rather than a single generic pass.
Do I still need to check with the manufacturer?
Yes. The limits used here are transcribed from public capability pages and carry the date they were read, shown at the bottom of the report. Fabs change processes, run promotions on advanced specs, and apply different rules by layer count and copper weight. Treat this as a pre-check that catches the obvious blockers before you upload, not as a quote or a guarantee.
Which file formats can be checked?
Any board format the viewer opens: KiCad, Gerber, Eagle, EasyEDA, Altium, PADS, P-CAD, and Protel 99. The check runs on the parsed geometry, so results depend on what the file actually contains. A Gerber export without a drill file has no holes to measure, and the report says so instead of pretending those checks passed.
Why does a check say "not evaluated"?
Because the file carries no data for it. A Gerber zip with no Excellon drill file cannot be checked for hole size or annular ring; a board with no outline layer cannot be checked for edge clearance. Reporting those as passing would be a lie of omission, so they are called out separately from genuine passes.
Are silkscreen problems serious?
No, and the report marks them as warnings rather than failures for that reason. Thin lines and tiny text print badly or not at all, which makes reference designators useless for hand assembly and rework, but the board is still fabricated and still works. Fix them when convenient; do not hold an order for them.
Is anything uploaded to a server?
No. Parsing and every DFM calculation run in your browser. The board file never leaves your machine, which matters when the design is under NDA. There is no account, no queue, and no per-day limit.
Check your board now
Drop a board file into the viewer, then click DFM in the toolbar. Nothing is uploaded — parsing and every calculation run in your browser.
Open the viewer