PCB 叠层指南 — 选层、选材、选阻抗

Use 2 layers if: total component count under ~50, no high-speed signals (USB, HDMI, DDR), and you have enough surface area to route everything without crossings. Use 4 layers if: you need a continuous ground reference for any signal trace (improves EMC and impedance), more than 50 components, or any signal above 50 MHz. The cost difference at JLCPCB is minor — a 4-layer 100×100mm board is ~$2 vs $5 in single-piece pricing — and the design effort drops significantly because you don't need to route returns alongside signals on a 2-layer board.

Signal — Ground — Power — Signal. Top is signal+components, then a continuous ground plane, then power plane, then signals on bottom. Total thickness typically 1.6mm with each layer ~0.36mm prepreg between copper. JLCPCB's default stackup uses this arrangement with FR4 dielectric (Dk≈4.5 at 1 GHz). High-speed boards reverse the inner pair (Signal — Power — Ground — Signal) when the dominant nets reference the upper inner layer, but for general purpose, GND-as-second-layer is the convention because it's easier to route returns to the top signals through nearby vias.

The return current of a signal flows on the nearest reference plane underneath. If the layer 2 reference is solid GND, your signal's return path is solid; if it's split (a power plane with cuts for different domains), the return current has to detour around the cut, which radiates EMI and creates impedance discontinuities. Rule: keep your high-speed signal layer adjacent to a continuous reference plane. For DDR3 and faster, this rule is non-negotiable.

A stackup where you've calculated the trace width and dielectric thickness to produce specific impedances (typically 50Ω single-ended for USB/HDMI, 90Ω differential for USB 2.0, 100Ω differential for USB 3+ and Ethernet). The fab needs to know: target impedance, layer of the trace, copper weight (1oz typical for outer, 0.5oz typical for inner), dielectric Dk and thickness. JLCPCB and PCBWay both offer impedance-controlled stackups for $20-50 surcharge. Provide your stackup spec in the order notes; they'll tweak prepreg thickness to hit the impedance target.

6 layers: Signal — Ground — Signal — Signal — Power — Signal. The middle two layers absorb the routing density that 4 layers can't handle. 8 layers: Signal — Ground — Signal — Power — Ground — Signal — Ground — Signal, providing two separate ground planes (digital + analog or noisy + quiet). Use 6 layers for typical microcontroller boards with 200+ components and BGA escape routing. Use 8 layers for mixed-signal designs (RF + digital), large BGAs (FPGA, SoC), or high-speed differential pairs that need their own dedicated reference layers. Cost scales roughly 1.5x per added layer pair.